Hardware Engineers: RTL Implementation and Evaluation Workflows
Terac$147/hrUnited StatesRemote in United StatesContractPosted 1w agoStill open, checked every nightSpaceJobs.Now is free for job seekers. Some links here pay us: a staffing agency, shift app, training program, course or store may pay us when you join or buy through our link, and a job ad network pays us when you click or apply to a job it carries (we mark those as sponsored or say so beside Apply). A job whose link pays us can be shown higher in a list. None of this costs you anything or changes what you are paid, and no employer can buy a spot or a featured place here.
About the job
What We're Researching
We're running a paid study on modern hardware description workflows and RTL implementation. Our goal is to understand how engineers approach automated evaluation and design verification in complex systems. This research feeds directly into improving tooling and methodologies for hardware development.
How It Works
You will participate in a remote interview to walk us through your typical hardware design process. We will ask you to review specific RTL implementation scenarios and discuss your approach to automated evaluation. You will share your screen to demonstrate how you handle hardware description workflows in practice. The session concludes with a discussion on the challenges you face with current verification tools.
Who This Is For
We are looking for experienced hardware engineers who specialize in RTL design and implementation. We welcome ASIC designers, FPGA engineers, hardware verification specialists, and system-on-chip (SoC) architects. You should have hands-on experience with hardware description languages and automated evaluation frameworks.
What You'll Do
- Walk us through your approach to RTL implementation and hardware description
- Review and react to specific automated evaluation scenarios
- Describe a recent time you tackled a complex hardware verification challenge
- Provide feedback on current workflows and tooling gaps
Who Should Apply
- Professional experience in hardware engineering or RTL design
- Hands-on background with hardware description languages (Verilog, VHDL, or SystemVerilog)
- Familiarity with automated evaluation and verification workflows
- Comfortable discussing technical design choices in a remote interview
Compensation
$147 per hour
Ready to participate?
Start your paid interview now
About Terac
Terac is building the world's largest pool of vetted human experts for AI. Researchers, AI labs, and product teams use Terac to recruit, screen, and pay study participants across industries, languages, and skill sets.
Learn more at terac.com or on YouTube at @jointerac .
Where you can work from
This job is 100% remote, for applicants who live in the United States.
From Terac's job posting, checked 10 Nov 2026. The employer's own page is the final word on requirements and availability. This is work on AI systems for an AI company, not for a space employer: never share export-controlled or proprietary technical data in a task, an application or an interview.
About Terac
Paid studies and AI-training tasks for verified experts, each showing its pay before you accept.
How it pays: Approved work is credited to your Terac balance in US dollars and cashed out through its payout partner Whop, from $12.50 to $10,000 a day, or through Virtual Incentives where Whop cannot pay (its payment docs, 29 Oct 2026).
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