Principal FinFET IC Mask Layout Designer – TeraWave

## Application close date Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion.

Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based connectivity with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth.

This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations. ## Job Description Blue Origin is seeking candidates with extensive hands-on experience in Analog/mixed-signal IC mask layout in advanced FinFET technologies to participate in and/or lead the physical implementation of high-performance integrated circuits for TeraWave.

You will work closely with circuit designers to develop layouts for high-speed data converters (ADCs/DACs), PLLs, filters, amplifiers, clocking, and biasing circuits.

You will be responsible for delivering high-quality, manufacturable layouts that meet circuit performance, reliability, and integration requirements, while contributing to innovative solutions that drive Blue Origin’s mission of enabling millions to live and work in space for the benefit of Earth.

Responsibilities and technical leadership scope will vary according to experience and level. ## Special Mentions - Relocation provided - Travel expected up to 10% of the time - Interviews will include a technical assessment - This role is based on site in San Diego (preferred), CA; or Cupertino, CA.

A temporary remote work exception is approved while our San Diego site is being developed. ## Responsibilities include but are not limited to - Develop custom transistor-level layouts for analog/mixed-signal circuits in advanced FinFET technologies, including floorplanning, top level integration, device placement, routing, and physical verification. - Collaborate with circuit designers to meet performance, matching, noise isolation, area, and reliability requirements. - Apply FinFET-specific layout techniques to address device geometry constraints, orientation, layout-dependent effects, and parasitic coupling. - Implement matched device structures, sensitive signal routing, shielding, and isolation appropriate to circuit requirements. - Perform design rule checking (DRC), electrical rule checking (ERC), and layout-versus-schematic (LVS) verification; investigate and resolve complex verification errors. - Generate parasitic extraction results and collaborate with circuit designers to identify and resolve layout-related performance issues. - Implement power and ground distribution that meets electromigration, current density, and voltage-drop requirements. - Develop layout schedules, identify implementation risks and dependencies, and deliver verified layouts in alignment with project milestones. - Support hierarchical planning, top-level integration, and tape-out preparation, including ESD structures, pad integration, density fill, and applicable design-for-manufacturability checks. - Collaborate with circuit designers, CAD engineers, and foundry partners to resolve layout, PDK, and verification issues. - Lead layout reviews, document best practices, and mentor less-experienced layout designers. ## Minimum Qualifications - Bachelor’s degree in electrical engineering - 10+ years of relevant professional experience - Understanding of basic electrical parameters and relationships such as Ohm’s law, performing calculations for sizing metal layers to meet IR drop requirements and current density, etc. - Direct hands-on experience developing analog/mixed-signal custom layouts in FinFET technologies. - Strong understanding of device matching, symmetry, parasitic effects, noise isolation, coloring and layout-dependent effects. - Proficiency with Cadence Virtuoso, including connectivity-driven layout using Virtuoso XL. - Experience with Siemens Calibre or equivalent physical verification tools, including DRC/LVS debugging. - Understanding of advanced-node layout constraints, electromigration, current density, and power-routing requirements. - Experience translating circuit schematics and designer requirements into verified device- and block-level layouts. - Strong communication skills and the ability to work independently on challenging layout problems. - Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. ## Preferred Qualifications - Experience with high-speed ADC/DAC, amplifier, filter, PLL, clock distribution, reference generator, and LDO layouts. - Experience with full-chip floorplanning, hierarchical integration, and successful tape-out delivery. - Experience preparing and releasing final layout databases to the foundry. - Familiarity with chip-level ESD structures, pad integration, density fill, and design-for-manufacturability requirements. - Experience resolving complex physical verification issues across hierarchical designs. - Experience leading layout projects, coordinating multiple contributors, and mentoring layout designers. - Experience collaborating with packaging engineers on pad placement and die interfaces. ## Base Pay Range for CA applicants is $269,175.00 - $376,843.95 ## Culture Statement Don’t meet all desired requirements?

Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway.

You may be just the right candidate for this or other roles. ## Export Control Regulations Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. ## Background Check - Required for all positions: Blue’s Standard Background Check - Required for Certain Job Profiles: Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation - Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs. and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. - Required for certain Job Profiles: Ability to obtain and maintain Merchant Mariner Credential, which includes pre-employment and random drug testing as well as DOT physical ## Benefits - Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program. - Stock Options for all regular employees (working at least 20 hours/week) - Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays. - Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward indivi