ASIC Design Engineer

AST SpaceMobile and our global partners are building the first and only space-based cellular broadband network to be accessible by standard smartphones. Called SpaceMobile, this ultra-powerful network is being designed to provide connectivity at 4G/5G speeds everywhere on the planet – on land, at sea and in flight.

Position Overview

We are seeking an ASIC Design Engineer to contribute to the design and implementation of complex silicon solutions used in AST’s space‑based communications systems.

The Silicon Team in Edinburgh is a small, highly focused group responsible for developing high‑value silicon that is core to AST’s mission of “Connecting the unconnected” - delivering the world’s first space‑based mobile broadband network.

The team works collaboratively to define and build next‑generation silicon, exploring advanced silicon technologies to continuously improve performance, capability, and efficiency. This is a hands‑on environment where silicon decisions directly impact AST’s ability to deliver a global communications network from space.

In this role, you will focus on high‑quality RTL development, micro‑architecture definition, and close collaboration across engineering disciplines. You will work alongside architecture, verification, and system teams - both internal and external - to deliver robust, high‑performance ASIC and SoC designs from concept through tape‑out.

Key Responsibilities

• Create high‑quality micro‑architecture specifications and RTL code.
• Contribute to SoC integration and subsystem development.
• Work with internal and external stakeholders, including architecture, verification, and software teams.
• Participate in design reviews, providing technical input.
• Ensure alignment with requirements and design best practices.

Education

BEng in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.

Experience

• Deep knowledge of hardware and digital design fundamentals.
• Strong SystemVerilog knowledge.
• Experience with SoC integration.
• Prior experience on complex RTL designs such as high‑speed I/O, CPUs, accelerators, or complex network‑on‑chip implementations.
• Ability to write clear, high‑quality micro‑architecture specifications.
• Competency in Python scripting or programming.

Preferred Qualifications

• Master’s or PhD degree in a relevant technical discipline.
• Experience on large SoC / ASIC designs.
• RF knowledge is a strong plus.
• Understanding of digital signal processing.
• Experience with MATLAB is a plus.
• Background in communications or mobile silicon system design.

Soft Skills

• Ability to collaborate closely with architecture, verification, software, and system teams.
• Ability to work effectively with internal and external stakeholders.
• Ability to provide technical input during design reviews.

Technology Stack

• SystemVerilog
• Python scripting or programming
• MATLAB

Physical Requirements

• Ability to work in a standard office environment and use a computer for extended periods.
• Occasional travel may be required to visit suppliers or other AST SpaceMobile design centers.

This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands .

AST SpaceMobile is an Equal Opportunity, at will Employer; employment is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.